Non-volatile memory device consists of memory cell array including word lines and bit lines. In general, FET (field effect transistor) is a basic element of the memory cell. The word line connects gates of the transistors and the bit line connects drains of the transistors. A programming operation for a selected memory cell can be performed by floating certain word line and bit line. However, when it is desired to program the selected memory cell during application, the unselected memory cells connected to the same word line and adjacent to the selected memory cell may be programmed also. Such a phenomenon is called “program disturb”.
The U.S. Pat. No. 6,469,933 discloses a method for decreasing program disturb in memory cells. When memory cell array is programmed, a ground voltage is applied to the bit line of the memory cell to be programmed, while a high voltage is applied to the bit line of the adjacent memory cells needless to be programmed, thus forming a complementary bit line to decrease the program disturb. The basic principle of the above method is to decrease program disturb by controlling the programming operation of memory cell. Thus, it is necessary to control not only the bit line voltage of the memory cell needed to be programmed, but also the bit line voltage of memory cells needless to be programmed. Therefore, it is not easy to operate.